Rankiteo Logo
Rankiteo
Leader in Cyber Underwriting
Loading...
NEWRankiteo Cyber Underwriting Desktop - Score, price, and bind from your desktop
WindowsmacOSLinux
Download

Comparison Overview

Micron Technology SingaporeMicron Technology Singapore
VS
AMDAMD
Micron Technology Singapore

Micron Technology Singapore

1 N Coast Drive, Woodlands, 757432, SG

Last Update: 08/03/2026

View Profile
Between 750 and 799
http://sg.micron.com
757/1000Fair

Micron Singapore hosts four wafer fabrication facilities and one assembly and test facility. As Micron's designated NAND Center of Excellence, the site is home to the industry’s leading 3D NAND technology, providing scale to future NAND technology transitions that will ...

NAICS:3344
NAICS Definition:Semiconductor and Other Electronic Component Manufacturing
Employees:None
Subsidiaries:3
12-month incidents
0
Known data breaches
0
Attack type number
0
AMD

AMD

2485 Augustine Drive, Santa Clara, California, US, 95054

Last Update: 19/06/2026

View Profile
Between 750 and 799
http://www.amd.com
784/1000Fair

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelli...

NAICS:3344
NAICS Definition:Semiconductor and Other Electronic Component Manufacturing
Employees:56,967
Subsidiaries:5
12-month incidents
1
Known data breaches
0
Attack type number
2

Compliance Ranges Comparison

Based On Specific Ai Models Category
Micron Technology Singapore

Micron Technology Singapore

-
ISO 27001Not verified
ISO 27001
-
SOC2 Type 1Not verified
SOC2 Type 1
-
SOC2 Type 2Not verified
SOC2 Type 2
-
GDPRNot verified
GDPR
-
PCI DSSNot verified
PCI DSS
-
HIPAANot verified
HIPAA
AMD

AMD

-
ISO 27001Not verified
ISO 27001
-
SOC2 Type 1Not verified
SOC2 Type 1
-
SOC2 Type 2Not verified
SOC2 Type 2
-
GDPRNot verified
GDPR
-
PCI DSSNot verified
PCI DSS
-
HIPAANot verified
HIPAA

Benchmark & Cyber Underwriting Signals

Incidents vs Semiconductor Manufacturing Industry Avg (This Year)

No incidents recorded for Micron Technology Singapore in 2026.

Incidents

Incidents vs Semiconductor Manufacturing Industry Avg (This Year)

AMD has 6.54% fewer incidents than the average of all companies with at least one recorded incident.

Incidents

Incident History - Micron Technology Singapore (X = Date, Y = Severity)

Micron Technology Singapore cyber incidents detection timeline including parent company and subsidiaries.

No timeline data available
R - Ransomware
C - Cyber Attack
D - Data Breach
V - Vulnerability

Incident History - AMD (X = Date, Y = Severity)

AMD cyber incidents detection timeline including parent company and subsidiaries.

R - Ransomware
C - Cyber Attack
D - Data Breach
V - Vulnerability

Notable Incidents

Last Cyber / HR Incidents / Global...
Micron Technology Singapore

Micron Technology Singapore

Incidents
No explicit notable incidents reported.
AMD

AMD

Incidents
🔒 Incident : Vulnerability
AMD1781267811
🔒 Incident : Vulnerability
AMD1932419101425
🔒 Incident : Ransomware
SAL5592855100325

FAQ

Between Micron Technology Singapore company and AMD company, which one has the best AI Cybersecurity Score ?
Between Micron Technology Singapore company and AMD company, which one has experienced more cyber incidents in the past ?
Between Micron Technology Singapore company and AMD company, which one has experienced more cyber incidents this year ?
Between Micron Technology Singapore company and AMD company, which one has experienced at least one ransomware attack ?
Between Micron Technology Singapore company and AMD company, which one has experienced at least one data breach ?
Between Micron Technology Singapore company and AMD company, which one has experienced at least one targeted cyberattack ?
Between Micron Technology Singapore company and AMD company, which one has experienced at least one vulnerability ?
Between Micron Technology Singapore company and AMD company, which one holds the most compliance certifications ?
Between Micron Technology Singapore company and AMD company, which one holds the fewest compliance certifications ?
Between Micron Technology Singapore company and AMD company, which one has the most subsidiaries ?
Between Micron Technology Singapore company and AMD company, which one has the largest number of employees ?
Between Micron Technology Singapore and AMD, which company holds both SOC 2 Type 1 certifications ?
Between Micron Technology Singapore and AMD, which company holds both SOC 2 Type 2 certifications ?
Which company is ISO 27001 certified - Micron Technology Singapore or AMD ?
Which company is PCI DSS compliant - Micron Technology Singapore or AMD ?
Between Micron Technology Singapore and AMD, which company complies with HIPAA regulations for healthcare data ?
Between Micron Technology Singapore and AMD, which company complies with GDPR requirements ?

Latest Global CVEs

CVE-2026-54236
SUMMARY

vLLM is an inference and serving engine for large language models (LLMs). Prior to 0.23.1rc0, the fix for CVE-2026-22778, which introduced a sanitize_message helper that strips object-repr memory addresses from error messages before they reach the client, is incomplete: several response paths echo str(exc) directly to clients without calling sanitize_message. The unsanitized sites include the Anthropic API router in vllm/entrypoints/anthropic/api_router.py (the POST /v1/messages and POST /v1/messages/count_tokens handlers), the Server-Sent Events streaming converter in vllm/entrypoints/anthropic/serving.py, and the realtime speech-to-text WebSocket in vllm/entrypoints/speech_to_text/realtime/connection.py. These paths catch the exception inside the route coroutine and construct the JSONResponse themselves, bypassing the sanitizing global FastAPI exception handler, and WebSocket frames do not traverse that handler chain at all. Using the same primitive as the parent issue, an unauthenticated attacker can send malformed image bytes through the Anthropic Messages API image content parts so that PIL.Image.open raises an UnidentifiedImageError whose message contains the BytesIO object repr, leaking the heap memory address verbatim in the error.message field of the response body. This vulnerability is fixed in 0.23.1rc0.

PUBLISHED
Date2026-06-22
UPDATED
Date2026-06-22
RISK INFORMATION (Score: 5.3)
CVSS3
Base Score: 5.3
Complexity: LOW
CVSS:3.1/AV:N/AC:L/PR:N/UI:N/S:U/C:L/I:N/A:N
IMPACT SCORE
1.4
EXPLOITABILITY
3.9
CVE-2026-54235
SUMMARY

vLLM is an inference and serving engine for large language models (LLMs). Prior to 0.23.1rc0, ll temperature validation gates use comparison operators (<, >), which silently evaluate to False for NaN and for positive Infinity in Python's IEEE 754 float semantics. Both values pass every guard and propagate to GPU sampling kernels, where they produce undefined behavior or CUDA errors that can crash the inference worker. This vulnerability is fixed in 0.23.1rc0.

PUBLISHED
Date2026-06-22
UPDATED
Date2026-06-22
RISK INFORMATION (Score: )
CVSS4
Base Score: 6.9
Complexity: LOW
CVSS:4.0/AV:N/AC:L/AT:N/PR:N/UI:N/VC:N/VI:N/VA:L/SC:N/SI:N/SA:N/E:X/CR:X/IR:X/AR:X/MAV:X/MAC:X/MAT:X/MPR:X/MUI:X/MVC:X/MVI:X/MVA:X/MSC:X/MSI:X/MSA:X/S:X/AU:X/R:X/V:X/RE:X/U:X
IMPACT SCORE
NA
EXPLOITABILITY
NA
CVE-2026-54233
SUMMARY

vLLM is an inference and serving engine for large language models (LLMs). Prior to 0.23.1rc0, vLLM's /v1/audio/transcriptions endpoint limits compressed upload size but not decoded PCM output. A 25MB OPUS file expands to ~14.9GB of float32 PCM at decode time. This vulnerability is fixed in 0.23.1rc0.

PUBLISHED
Date2026-06-22
UPDATED
Date2026-06-22
RISK INFORMATION (Score: 6.5)
CVSS3
Base Score: 6.5
Complexity: LOW
CVSS:3.1/AV:N/AC:L/PR:L/UI:N/S:U/C:N/I:N/A:H
IMPACT SCORE
3.6
EXPLOITABILITY
2.8
CVE-2026-54232
SUMMARY

vLLM is an inference and serving engine for large language models (LLMs). Prior to 0.22.1, the vLLM Dockerfile is vulnerable to a dependency confusion attack through the flashinfer-jit-cache package. The package is installed from a custom index (flashinfer.ai/whl/) using --extra-index-url, but the package name was not registered on PyPI, and UV_INDEX_STRATEGY="unsafe-best-match" is set globally. An attacker who registers flashinfer-jit-cache on PyPI with version 0.6.11.post2 can execute arbitrary code as root during the Docker build and backdoor every resulting container image, enabling exfiltration of all user prompts, API credentials, and model data from production vLLM deployments This vulnerability is fixed in 0.22.1.

PUBLISHED
Date2026-06-22
UPDATED
Date2026-06-22
RISK INFORMATION (Score: 8.8)
CVSS3
Base Score: 8.8
Complexity: LOW
CVSS:3.1/AV:N/AC:L/PR:N/UI:R/S:U/C:H/I:H/A:H
IMPACT SCORE
5.9
EXPLOITABILITY
2.8
CVE-2026-53923
SUMMARY

vLLM is an inference and serving engine for large language models (LLMs). From 0.5.5 until 0.23.1rc0, integer truncation of tensor dimensions in vLLM's GGUF dequantize kernels (csrc/quantization/gguf/gguf_kernel.cu) causes partial tensor processing. The output tensor is allocated at full size via torch::empty (uninitialized memory), but the dequantize CUDA kernel processes only a truncated number of elements. The unfilled portion of the output tensor retains whatever was previously in GPU memory. In multi-tenant inference deployments, this residual GPU memory may contain tensor data from other users' inference requests, constituting information disclosure. This vulnerability is fixed in 0.23.1rc0.

PUBLISHED
Date2026-06-22
UPDATED
Date2026-06-22
RISK INFORMATION (Score: )
CVSS4
Base Score: 5.3
Complexity: LOW
CVSS:4.0/AV:N/AC:L/AT:N/PR:N/UI:P/VC:L/VI:L/VA:N/SC:N/SI:N/SA:N/E:X/CR:X/IR:X/AR:X/MAV:X/MAC:X/MAT:X/MPR:X/MUI:X/MVC:X/MVI:X/MVA:X/MSC:X/MSI:X/MSA:X/S:X/AU:X/R:X/V:X/RE:X/U:X
IMPACT SCORE
NA
EXPLOITABILITY
NA